John Emmert

John Martin Emmert

Professor

Engineering Research Cntr

532

CEAS - Elec Eng & Computer Science - 0030

Professional Summary

Dr. John (Marty) Emmert is a Professor in the Department of Electrical Engineering and Computer Science. He is also Director of the NSF Center for Hardware and Embedded Systems Security and Trust (CHEST) IUCRC. He has six United States patents and has directed over $9M in research funding. In addition, he and colleagues have been awarded five phase II Small Business Innovative Research contracts from the Department of Defense. He is a senior member of the Institute of Electrical and Electronics Engineers (IEEE), and he has received the IEEE Harold Nobel Award and the AFRL Sensors Directorate James B. Tsui Award for best patent.
 
His research interests span various topics including: VLSI Design and Architectures; ASICs; FPGAs; Embedded Systems; Hardware Security, Assurance, and Trust; Reconfigurable Computing; Fault Tolerance for Integrated Circuits; Electronic Warfare; GPS; and Automated Tools for IC Design and Trust. 
 
His research has been funded by AFRL, DARPA, NSF, State of Ohio and various industries including EDAptive Computing Inc.
 
He also served on active duty and as a reservist in the United States Air Force from 1989-2015. In the Air Force he held positions from UAV pilot to reserve wing commander, and he retired after 26 years as a Colonel. He has been awarded the Air Force Legion of Merit and five Meritorious Service Medals.

Education

Ph.D., University of Cincinnati Cincinnati, Ohio, 1999 (Computer Engineering)

M.S., Air Force Institute of Technology Dayton, OH, 1993 (Electrical Engineering)

B.S., University of Kentucky Lexington, KY, 1987 (Electrical Engineering)

Research and Practice Interests

Computer Hardware (HW), especially Integrated Circuit (IC) Design: Field Programmable Gate Arrays (FPGA) and Application Specific Integrated Circuits (ASIC); Very Large Scale Integrate Circuit (VLSI) Design; Assurance, Security, and Trust for HW; HW Fault Tolerance; Asynchronous Circuit Design; Reconfigurable Computing; Cyber Physical Systems (CPS); Embedded Systems; Automated Computer Aided Design (CAD) Algorithm and Tool Development for IC HW; Circuits, Systems, and Sensors for Electronic Warfare (EW); and Integration of Global Positioning System (GPS) Algorithms and Methods.

Research Support

Grant: #CNS-1854461 (transfer in 1747726) Investigators:Emmert, John 08-01-2018 -10-31-2018 National Science Foundation Planning IUCRC University of Cincinnati: Center for Hardware and Embedded System Security and Trust (CHEST) Role:PI $13,375.00 Awarded Level:Federal

Grant: #Teaming Agreement Investigators:Emmert, John 04-26-2019 -04-25-2020 Booz Allen Hamilton TEAMING AGREEMENT By and between BOOZ ALLEN HAMILTON INC. and University of Cincinnati Role:PI $.00 Awarded Level:Industry

Grant: #SETS04-UC-2019 / FA8650-14-D-1724/0004 Investigators:Emmert, John; Jha, Rashmi; Vemuri, Ranganadha 06-01-2019 -04-30-2020 Air Force Research Laboratory Secure Engineering of Trusted Systems (SETS 04) Role:PI $932,517.00 Awarded Level:Federal

Grant: #CNS-1916722 Investigators:Emmert, John 10-01-2019 -09-30-2024 National Science Foundation Center for Hardware and Embedded Systems Security and Trust (CHEST) Role:PI $300,000.00 Awarded Level:Federal

Grant: #R40538 Investigators:Dong, Janet; Emmert, John; Ma, Ou 10-01-2019 -03-31-2020 UC's Urban Futures Digital Futures Anchor Development Program "Intelligent Robotics and Autonomous Systems (IRAS) - Combined team of the Pitch Day ""Intelligent Robotics"" team and ""Artificial Intelligence"" team" Role:Collaborator $10,000.00 Active Level:Internal UC

Grant: #SETS03-UC-2019 / FA8650-14-D-1724/0003 Investigators:Emmert, John 06-01-2019 -04-30-2020 Air Force Research Laboratory Secure Engineering of Trusted Systems (SETS 03) Role:PI $50,155.00 Awarded Level:Federal

Grant: #IMPACT02-UC-01-2020 / W9111QY-17-C-0114 Investigators:Emmert, John; Jha, Rashmi 01-02-2020 -08-25-2020 Air Force Research Laboratory PHASE I: Simplified Asynchronous Design Framework for Side Channel Attack (SCA) Obfuscation and Mitigation Role:PI $175,000.00 Awarded Level:Federal

Grant: #ECI / NSF 1916750 - CHEST Membership Funds Investigators:Emmert, John 10-01-2019 -09-30-2024 National Science Foundation IAB Membership Agreement for Edaptive Computing, Inc. (ECI) Role:PI $50,000.00 Awarded Level:Federal

Grant: #1907167 / 1916750 Investigators:Emmert, John 10-01-2019 -09-30-2024 National Science Foundation Allocation from University of Texas at Dallas to provide partial salary support for CHEST Research Manager position over term of five-year project duration Role:PI $10,000.00 Awarded Level:Federal

Grant: #ARA / NSF 1916750 - CHEST Membership Funds Investigators:Emmert, John 10-01-2019 -09-30-2024 National Science Foundation CHEST IAB Membership Agreement for Applied Research Associates, Inc. Role:PI $50,000.00 Awarded Level:Federal

Grant: #GA11454.PO#2237483 / 1916760 Investigators:Emmert, John 10-01-2019 -09-30-2020 National Science Foundation Allocation from University of Virginia provide partial salary support for CHEST Research Manager position over term of five-year project duration Role:PI $10,000.00 Awarded Level:Federal

Publications

Peer Reviewed Publications

Emmert J.; Ren S. (09-27-2012. )Successive approximation pipelined ADC with one clock cycle conversion rate.Electronics Letters, ,48 (20 ),1257-1258

Emmert J.; Ren S.; Siferd R. (09-01-2011. )Design and performance of a robust 180 nm CMOS standalone VCO and the integrated PLL.Analog Integrated Circuits and Signal Processing, ,68 (3 ),285-298

Abramovici M.; Emmert J.; Stroud C. (02-01-2007. )Online fault tolerance for FPGA logic blocks.IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ,15 (2 ),216-226

Baumgart S.; Cheatham J.; Emmert J. (07-24-2006. )A survey of fault tolerant methodologies for FPGAs.ACM Transactions on Design Automation of Electronic Systems, ,11 (2 ),501-533

Emmert J.; Rattan K.; Roy A.; Singh S. (12-01-2005. )Performance trade-offs for hardware/software implementation of a fuzzy logic controller on programma.Annual Conference of the North American Fuzzy Information Processing Society - NAFIPS, ,2005 ,484-488

Abramovici M.; Emmert J.; Stroud C. (12-01-2004. )Online BIST and BIST-based diagnosis of FPGA logic blocks.IEEE Transactions on Very Large Scale Integration (VLSI) Systems, ,12 (12 ),1284-1294

Bhatia D.; Emmert J.; Lodha S. (01-01-2003. )On using tabu search for design automation of VLSI systems.Journal of Heuristics, ,9 (1 ),75-90

Cheatham J.; Emmert J.; Jagannathan B.; Umarani S. (01-01-2003. )An FFT approximation technique suitable for on-chip generation and analysis of sinusoidal signals.Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, ,2003-January ,361-368

Cheatham J.; Emmert J.; Jagannathan B.; Umarani S. (01-01-2003. )A monolithic spectral BIST technique for control or test of analog or mixed-signal circuits.Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, ,2003-January ,303-310

Emmert J.; Kataria P.; Taylor A. (12-01-2001. )Window rip-up for faster testing and fault tolerance in FPGAs .AUTOTESTCON (Proceedings), ,149-158

Emmert J.; Stroud C.; Taylor A.; Travis J. (12-01-2001. )Recovering faulty processing elements to enhance reliability and lifecycle in VLSI processor arrays .AUTOTESTCON (Proceedings), ,524-531

Emmert J.; Heath J.; Stroud C.; Vocke N. (12-01-2001. )Routing algorithms for programmable logic device design and manufacturing test development .AUTOTESTCON (Proceedings), ,214-228

Emmert J.; Skaggs B.; Slaughter T.; Stroud C. (07-24-2001. )Fault injection emulator for field programmable gate arrays.Proceedings of SPIE - The International Society for Optical Engineering, ,4525 ,1-9

Cheatham J.; Emmert J. (01-01-2001. )On-line incremental routing for interconnect fault tolerance in FPGAs minus the router.IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, ,149-157

Bhatia D.; Emmert J. (01-01-2001. )Two-dimensional placement using tabu search.VLSI Design, ,12 (1 ),13-23

Abramovici M.; Emmert J.; Stroud C. (01-01-2001. )Roving STARs: An integrated approach to on-line testing, diagnosis, and fault tolerance for FPGAs in.Proceedings - NASA/DoD Conference on Evolvable Hardware, EH, ,2001-January ,73-92

Abramovici M.; Emmert J.; Lashinsky M.; Nall J.; Stroud C. (01-01-2001. )On-line BIST and diagnosis of FPGA interconnect using roving stars.Proceedings - 7th International On-Line Testing Workshop, IOLTW 2001, ,2001-January ,27-33

Abramovici M.; Baumgart S.; Emmert J.; Kataria P.; Stroud C.; Taylor A. (01-01-2001. )On-line fault tolerance for FPGA interconnect with roving STARs .IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, ,445-454

Bhatia D.; Emmert J. (12-01-2000. )Fault tolerant technique for FPGAs.Journal of Electronic Testing: Theory and Applications (JETTA), ,16 (6 ),591-606

Bailey J.; Emmert J.; Stroud C. (12-01-2000. )New method for testing re-programmable PLAs.Journal of Electronic Testing: Theory and Applications (JETTA), ,16 (6 ),635-640

Bailey J.; Emmert J.; Stroud C. (12-01-2000. )New bridging fault model for more accurate fault behavior .AUTOTESTCON (Proceedings), ,481-485

Abramovici M.; Emmert J.; Skaggs B.; Stroud C. (01-01-2000. )Improving on-line BIST-based diagnosis for roving STARs.Proceedings - 6th IEEE International On-Line Testing Workshop, ,31-39

Abramovici M.; Emmert J.; Skaggs B.; Stroud C. (01-01-2000. )Dynamic fault tolerance in FPGAs via partial reconfiguration.IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings, ,2000-January ,165-174

Bailey J.; Chhor K.; Emmert J.; Nikolic D.; Stroud C. (01-01-2000. )Bridging fault extraction from physical design data for manufacturing test development.IEEE International Test Conference (TC), ,760-769

Abramovici M.; Cheatham J.; Emmert J.; Kataria P.; Stroud C.; Taylor A. (01-01-2000. )Performance penalty for fault tolerance in roving STARs .Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), ,1896 ,545-554

Bhatia D.; Emmert J. (01-01-1999. )Tabu search: Ultra-fast placement for FPGAs .Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), ,1673 ,81-90

Bhatia D.; Emmert J. (01-01-1999. )Fast timing driven placement using tabu search .Proceedings - IEEE International Symposium on Circuits and Systems, ,1 ,

Bhatia D.; Emmert J. (01-01-1999. )Methodology for fast FPGA floorplanning .ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA, ,47-56

Bhatia D.; Emmert J. (01-01-1998. )Incremental routing in FPGAs.Proceedings of the Annual IEEE International ASIC Conference and Exhibit, ,217-221

Bhatia D.; Emmert J.; Randhar A. (01-01-1998. )Fast floorplanning for FPGAs .Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), ,1482 ,129-138

Bhatia D.; Emmert J. (01-01-1997. )Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhanc.Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), ,1304 ,141-150